use bits::{BitsOps, IntoBits};

use crate::{csrr, csrw, interrupt::Interrupt};

pub fn read() -> usize {
    csrr!(mideleg)
}
pub fn write(reg_val: usize) {
    csrw!(mideleg, reg_val)
}
pub fn cache() -> Cache {
    Cache { raw: read() }
}
pub struct Cache {
    raw: usize,
}
impl Cache {
    pub fn deleg(&mut self, interrupt: Interrupt) -> &mut Self {
        let idx: usize = interrupt.into();
        self.raw = self.raw.bits(idx as u32).set();
        self
    }
    pub fn undeleg(&mut self, interrupt: Interrupt) -> &mut Self {
        let idx: usize = interrupt.into();
        self.raw = self.raw.bits(idx as u32).clr();
        self
    }
    pub fn flush(self) {
        write(self.raw)
    }
}
